The present invention relates to a semiconductor device and a manufacturing method thereof. More particularly, it relates to a semiconductor device having a metal silicide layer, and a manufacturing method thereof.
In order to achieve a lower resistance of a semiconductor device, there has been generally employed a method in which a silicide is formed between the wiring material and the substrate. A conventional semiconductor device having a metal silicide layer is proposed in, for example, Patent Document 1.
[Patent Document 1]
Japanese Unexamined Patent Publication No. Hei 09 (1997)-283462